1. Field of the Invention
The present invention relates to an endurance testing system for an electrically erasable programmable read only memory (hereinafter referred to as an EEPROM) and, in particular, to a system for efficiently and correctly testing the endurance of the EEPROM.
2. Description of the Prior Art
Nowadays, many applications in various fields are found for EEPROMs, for example, the IC card. In that exemplary application of the EEPROM, personal data stored inside an IC card is very important and often needs to be changed. Such an application brings a high requirement on the reliability of the EEPROM, that is, the EEPROM to be utilized must be able to reliably maintain the data stored therein and to endure a significant number of write/erase operations without failure.
A typical FLOTOX (floating gate tunnel oxide) cell structure for an EEPROM is shown in FIG. 4. Referring to FIG. 4, the EEPROM cell of the FLOTOX type mainly includes a floating gate 1, a control gate 2, a drain 3, a source 4, a tunnel oxide 5 and a tunnel injection area A.
The data value stored in an EEPROM cell is determined by the charge amount in the floating gate 1 of the EEPROM cell. For the erase or write operation of the EEPROM cell, high voltages of different voltage polarities are required to be applied between the control gate 2 and the tunnel injection area A of the EEPROM cell to generate an FN (Fowler-Nordheim) tunnel current for changing the charge amount in the floating gate 1.
During the write operation, the floating gate 1 is charged by the tunnel current from the drain 3 of the EEPROM cell so that the threshold voltage (hereinafter referred to be as VT) thereof becomes more positive, wherein the VT is defined as the VGS value which make IDS equals 1 .mu. A when VDS equals 1V.
During the erase operation, the electrons in the floating gate 1 flow to the drain 3 as a tunnel current so that the VT of an EEPROM cell changes toward the negative direction. Furthermore, the data stored in an EEPROM cell can be obtained by a read operation which is also well known in this field and thus is not described herein.
The number of write/erase operations for which an EEPROM can endure is a very important index of endurance of the EEPROM. Particularly, the variation of the difference (window) between the threshold voltage after a write operation and the one after an erase operation can reflect the features of endurance and physical nature of the EEPROM.
In order to test the features of the endurance for an EEPROM cell, the prior art adopts the following steps: testing the threshold voltage (VT) thereof, switching to a write/erase circuit, generating write/erase pulses to perform programming, and switching back to the VT test circuit. The above procedures are controlled manually in the prior art. Not only is the test efficiency very low, but also the results are not reliable.
Therefore, there is a need to have a testing system capable of automatically performing erase/write operations as many times as desired and displaying the variation of the difference between the threshold voltages respectively after a write operation and an erase operation versus the operation times.